Design Verification Engineer (AI/GPU/CPU)

Overview

EQ Semi seeks a dedicated Design Verification Engineer specialized in ensuring the functional accuracy of sophisticated System-on-Chip (SoC) designs encompassing Artificial Intelligence (AI), Graphics Processing Unit (GPU), and Central Processing Unit (CPU) technologies. The role involves creating advanced verification environments based on the Universal Verification Methodology (UVM), performing both simulation and formal verification techniques, and driving the completion of coverage goals to confirm design integrity.

Qualifications and Experience

• Possession of a Bachelor's or Master's degree in Electrical or Computer Engineering.
• Minimum of five years experience in digital verification engineering.
• Strong expertise in SystemVerilog, UVM, and scripting languages essential for automation and testbench development.
• Practical experience utilizing industry-standard simulation tools, such as VCS and Questa.

Key Responsibilities

• Design and implement robust testbench environments and verification strategies for complex SoCs.
• Employ UVM and SystemVerilog along with formal verification methodologies to validate functional behaviors.
• Analyze and resolve simulation errors while enhancing code coverage to meet verification targets.
• Work closely with hardware design and architectural teams to validate functional correctness throughout the development cycle.

Additional Information

Position is full-time and based onsite in Saudi Arabia, requiring close collaboration with cross-functional engineering teams.